[SI-LIST] RX RJ larger than TX RJ?

[Sherman Chen]

Hi folks,
In 802.3-2015 10G KR standard, the max transmitter RJ is specified as
0.15UI (Table 72–6—Transmitter characteristics for 10GBASE-KR) meanwhile
the RX RJ tolerance is 0.13UI (Table 72–10—10GBASE-KR interference
tolerance parameters). Does this make sense to you?
As a comparison, in CEI 4.0 25G-LR spec while the TX RJ follows the same
limit as 10G KR, the RJ spec doesnt show up in the RX limit section ( Table
11-13. Receiver Input Jitter Specification) - only SJ is specified. Does
this mean the committee changed to adopt a different strategy of only
specifying the TX jitter + compliant channel + additional SJ at RX, and
leave the BER goal for each chip vendor to achieve, rather than specifying
every details of RX tolerance?
--
All the best,

Sherman

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["Vinu Arumugham" (Redacted sender "vinua" for DMARC)]

KR:

Table 72-6 has:

RJ  0.15 UI max.

DJ  0.15UI max.

DCD  0.035 UI max.

TJ 0.28 UI max.


To meet TJ max., RJ,DJ,DCD cannot all have the maximum value in a given TX.


For the interference tolerance test, Table 72-10,
SJ+RJ+DCD=0.115+0.13+0.035=0.28 which is the TX TJ max.


High freq. SJ is being used to emulate TX DJ.


Less RJ, more DJ/SJ is the most stressful condition. If the real TX had
more RJ and less DJ, a compliant RX will be able to handle that less
stressful condition.


CEI 4.0:

Section 11.3.2 says:

"A compliant receiver shall operate at the specified BER with the worst case
combination of a compliant transmitter and a compliant channel."

and Table 11-13 notes say:

"1. The Receiver shall tolerate the sum of these jitter contributions:
Total transmitter jitter from Table 11-7;Sinusoidal jitter as
defined in Table 11-13;The effects of a channel compliant to the Channel
Characteristics (Section 11.2.6)."


So the spec. looks complete.


Thanks,

Vinu

Post by Sherman Chen
Hi folks,
In 802.3-2015 10G KR standard, the max transmitter RJ is specified as
0.15UI (Table 72–6—Transmitter characteristics for 10GBASE-KR) meanwhile
the RX RJ tolerance is 0.13UI (Table 72–10—10GBASE-KR interference
tolerance parameters). Does this make sense to you?
As a comparison, in CEI 4.0 25G-LR spec while the TX RJ follows the same
limit as 10G KR, the RJ spec doesnt show up in the RX limit section ( Table
11-13. Receiver Input Jitter Specification) - only SJ is specified. Does
this mean the committee changed to adopt a different strategy of only
specifying the TX jitter + compliant channel + additional SJ at RX, and
leave the BER goal for each chip vendor to achieve, rather than specifying
every details of RX tolerance?

...

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[Sherman Chen]

Thanks for the clarification, Vinu.

RJ 0.15 UI max.
DJ 0.15UI max.
DCD 0.035 UI max.
TJ 0.28 UI max.
To meet TJ max., RJ,DJ,DCD cannot all have the maximum value in a given TX.
For the interference tolerance test, Table 72-10,
SJ+RJ+DCD=0.115+0.13+0.035=0.28 which is the TX TJ max.
High freq. SJ is being used to emulate TX DJ.
Less RJ, more DJ/SJ is the most stressful condition. If the real TX had
more RJ and less DJ, a compliant RX will be able to handle that less
stressful condition.
"A compliant receiver shall operate at the specified BER with the worst case
combination of a compliant transmitter and a compliant channel."
Total transmitter jitter from Table 11-7;Sinusoidal jitter as
defined in Table 11-13;The effects of a channel compliant to the Channel
Characteristics (Section 11.2.6)."
So the spec. looks complete.
Thanks,
Vinu

Post by Sherman Chen
Hi folks,
In 802.3-2015 10G KR standard, the max transmitter RJ is specified as
0.15UI (Table 72–6—Transmitter characteristics for 10GBASE-KR)

meanwhile

Post by Sherman Chen
the RX RJ tolerance is 0.13UI (Table 72–10—10GBASE-KR interference
tolerance parameters). Does this make sense to you?
As a comparison, in CEI 4.0 25G-LR spec while the TX RJ follows the same
limit as 10G KR, the RJ spec doesnt show up in the RX limit section (

Table

Post by Sherman Chen
11-13. Receiver Input Jitter Specification) - only SJ is specified. Does
this mean the committee changed to adopt a different strategy of only
specifying the TX jitter + compliant channel + additional SJ at RX, and
leave the BER goal for each chip vendor to achieve, rather than

specifying

Post by Sherman Chen
every details of RX tolerance?

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...

--
All the best,

Sherman

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