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[SI-LIST] Asian IBIS Summit (Tokyo) 2018 Agenda and Call for Participation
m***@sisoft.com
2018-11-05 02:45:20 UTC
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To All:

The IBIS Open Forum is holding its 13th Asian IBIS Summit Meeting in Japan.
We are meeting again in Tokyo on Monday, November 12, 2018, in the
afternoon.

JEITA (Japan Electronics and Information Technology Industries
Association) is the primary event sponsor.

JEITA is also conducting its 7th JEITA / IBIS Seminar starting at 10:00 am,
as noted below in the Japanese links. The seminar theme will be IBIS and
S-parameters.

For travel consideration, two other Asian IBIS Summits follow this event:
. Shanghai, P.R. China, Wednesday November 14, Parkyard Hotel
. Taipei, Taiwan, Wednesday, November 16, Sherwood Hotel

Mike LABONTE
SiSoft

Miyo KAWATA
ANSYS Japan K.K.

___________________________________________________________________

Asian IBIS Summit (Tokyo) 2018
Agenda and Call for Participation
___________________________________________________________________

Time/Date: Monday, November 12, 2018, 12:30 to 17:00
Meeting starts at 13:00

Location: Akihabara UDX Bldg.
4-14-1, Sotokanda, Chiyoda-Ku
Tokyo 101-0021, JAPAN

URL: Akihabara UDX Building (Japanese)
http://udx.jp/

Akihabara UDX Building in the Akihabara Crossfield
Conference Center (English)
http://www.akiba-cross.jp/english/

Room: NEXT1

Content: Presentations and Discussions

Purpose: Solicit and Exchange IBIS Model Related Information
and Ideas.

Organizational Sponsors:
Japan Electronics and Information Technology Industries
Association (JEITA)
IBIS Open Forum

Co-sponsors (in alphabetical order):
To Be Determined

Cost: FREE, including refreshments

JEITA IBIS Class and SUMMIT Link:
http://ec.jeita.or.jp/jp/modules/eguide/event.php?eid=40

AGENDA

13:00 SIGN IN

13:05 MEETING WELCOMES
- Mike LaBONTE (SiSoft, USA)
Chair, IBIS Open Forum
- Miyo KAWATA (ANSYS Japan K.K., Japan)
Chair, JEITA EDA Model Subcommittee

13:10 JEITA EDA Model Specialty Committee Report
Miyo KAWATA (ANSYS Japan K.K., Japan)

13:15 IBIS Update
Mike LaBONTE (SiSoft, USA)

13:25 Package Models for Critical Timing Validation with IBIS
Yukio MASUKO (Japan Electronics Packaging and
Circuits Association (JPCA), Japan)

13:50 Best Case Analysis
Shinichi MAEDA (KEI Systems, Japan)

14:15 A Practical Methodology for SerDes Design
Amy ZHANG*, Guohua WANG*, David ZHANG*, Zilwan MAHMOD*,
Anders EKHOLM** (Ericsson, *China, **Sweden)
[Presented by Anders EKHOLM (Ericsson, Sweden)]

14:45 Model Correlation for IBIS-AMI
Wenyan XIE*, Guohua WANG*, David ZHANG* Anders EKHOLM**
(Ericsson, *China, **Sweden)
[Presented by Anders EKHOLM (Ericsson, Sweden)]

15:20 BREAK

15:40 Concerns when Applying Channel Simulation to DDR Interface
Masaki KIRINAKA, Akiko TSUKADA
(Fujitsu Interconnect Technologies Limited, Japan)
[Presented by Masaki KIRINAKA
(Fujitsu Interconnect Technologies Limited, Japan)]

16:05 Simulation Technology for Memory Designers in DDR4/5
Satoshi NAKAMIZO (Keysight Technologies, Japan)

16:30 Study of DDR Asymmetric Rt/Ft in Existing IBIS-AMI Flow
Wei-kai SHIH*, Wei-hsing HUANG**; SPISim (*Japan, **USA)
[Presented by Wei-kai SHIH (SPISim, Japan)

16:55 Study on Potential Feature Additions for Bit-by-bit
Simulation Technique to Address the DDR5 Requirements
Ted MIDO (Synopsys, Japan)

17:25 CONCLUDING ITEMS

17:35 END OF IBIS SUMMIT MEETING

BACKGROUND
This year we holding the 13th Asian IBIS Summit meeting in Japan.
Several high-technology Japanese companies operate in the Tokyo
and Yokohama area and are affiliated with JEITA and IBIS.

Our objective is to reach out internationally to communicate with
the local experts and to learn of regional concerns.

CONFERENCE LANGUAGE

The conference language is English. Presenters may deliver in
Japanese, but the presentation slides should be in English.

IBIS SUMMIT

This meeting will be conducted as a formal IBIS Summit Meeting.
Presentations will be archived in an electronic format on our
Summit site, and meeting minutes will be issued. However no formal
decisions requiring votes will be planned.

CALL FOR PARTICIPANTS

People involved in IBIS model development, EDA tool development and
digital circuit design are invited to participate in the Summit
meeting. If you wish to participate, please register with the
information below:

Name:
E-mail address:

Company:
Top-level Web Link:

Country:

Send to BOTH:

Bob ROSS Teraspeed Labs
***@teraspeedlabs.com

Miyo KAWATA ANSYS Japan K.K
***@ansys.com

SIGNUP DEADLINE: November 9, 2017

Advance registration is requested for refreshments planning.

LIST OF NEARBY HOTELS AND TRAVEL RULES

Hotels near the Akihabara Crossfield Conference Center can be
found through internet searches.

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